[{"name":"R4-2006533","title":"Discussion on FR1 CA and EN-DC power imbalance requirements","source":"Intel Corporation","contact":"Andrey Chervyakov","contact-id":47232,"tdoctype":"discussion","for":"Discussion","abstract":"","secretary_remarks":"","agenda_item_sort_order":330,"ainumber":"6.18.1.4","ainame":"FR1 CA and EN-DC power imbalance requirements [NR_perf_enh-Perf]","tdoc_agenda_sort_order":24120,"status":"noted","reservation_date":"2020-05-14 14:38:02","uploaded":"2020-05-15 21:52:05","revisionof":"","revisedto":"","release":"Rel-16","crspec":"","crspecversion":"","workitem":[{"winame":"NR_perf_enh-Perf"}],"crnumber":"","crrevision":"","crcategory":"","tsg_crp":"","lsreplyto":"","lsto":"","Cc":"","lsoriginalls":"","lsreply":"","link":"https:\/\/www.3gpp.org\/ftp\/TSG_RAN\/WG4_Radio\/TSGR4_95_e\/Docs\/R4-2006533.zip","group":"R4","meeting":"R4-ah-38108","year":2020,"uicc_affected":null,"me_affected":null,"ran_affected":null,"cn_affected":null,"clauses_affected":null,"crsinpack":null,"crsinpacknumber":0}]